MIPS tech has just shifted its focus from its MIPS CPU instruction set architecture to risc-v design On Tuesday, the company boldly announced the evocore P8700 / i8500 multiprocessor IP core and is committed to providing first-class performance and scalability Phoronix pointed out that the risc-v design of MIPs tech focuses on the high-performance field of the processor market, and recently praised this open-source processor instruction level architecture (ISA).
Take the evocore P8700, which focuses on "superscalar performance", as an example. It can be extended to 64 clusters, 512 cores and 1024 threads (harts / threads). It is expected to be available in the fourth quarter.
As for evocore i8500, MIPs tech claims that the SOC has the best energy efficiency performance of its kind. Unfortunately, the company has not disclosed the launch date of relevant products. Interested friends can move to MIPs Com official website For more details.