During the financial analyst day on Thursday, amd released more details on the basis of consolidating its existing product roadmap Firstly, the company disclosed that the Zen 4 family will have 5nm and 4nm models, and this series of processors will also move towards 4nm and 3nm, but did not further point out the differences between SKUs / small chips in different processes.
（via Phoronix）
Secondly, amd confirmed that Zen 4 will support avx-512 and AI acceleration instruction set, and the instruction per clock (IPC) will be 9~10% higher than Zen 3.
● in addition, thanks to the transition from DDR4 to ddr5 memory controller, the bandwidth of each Zen 4 kernel is expected to be increased by up to 125%.
● as for Zen 5 in 2024, AMD will introduce a redesigned "basic micro architecture", and it is expected that there will be more optimization in artificial intelligence (AI) and machine learning (ML).
Then came the CPU product line of Xiaolong (epyc) server:
● the enterprise Java performance of Genoa SKU of epyc 7004 series can be improved by more than 75% compared with that of epyc 7003 series.
● Genoa is expected to be launched in the fourth quarter of 2022, and AMD has confirmed to provide 12 channel ddr5, PCIe 5.0 and CXL support.
● Bergamo CPU based on Zen 4C cloud computing core will bring twice the computing density of the third generation Xiaolong, and it is expected to be launched in the first half of 2023.
● genoa-x is a derivative model with 3D v-cache stack cache, and the cache capacity of each CPU slot is expected to exceed 1GB.
● finally, Siena is a low-cost Zen 4 Platform focusing on edge computing and telecom applications.